The present invention relates to a solid electrolytic capacitor and a method of manufacturing the same.
Conventionally, a solid electrolytic capacitor, manufactured with the use of tantalum or the like for a valve action metal, has been used for a power supply circuit of a CPU since it is compact and has a large capacitance and a superior frequency characteristic.
Recently, there has been a demand for further improving the frequency characteristic. Therefore, a solid electrolytic capacitor with a conductive polymer used for a cathode layer has been developed against the conventional solid electrolytic capacitor with manganese dioxide used for a cathode layer. Thereby, an equivalent series resistance (hereinafter, referred to as ESR) has been improved and reduced to less than or equal to one-tenth of the conventional one.
With the increase of the CPU operating frequencies in recent years, however, there have increased demands for improving noise characteristics of the power supply circuits of the CPUs or for supplying a large permissible ripple current. Thereby, a capacitor having a still lower ESR characteristic has been needed.
Moreover, since apparatuses having the CPUs as mentioned above are being developed for downsizing and more advanced functions, it has become necessary to achieve a capacitor satisfying the requirements for a still lower ESR, a compact size, a large capacity, and a thin type.
When a plurality of capacitors are connected in parallel, a total capacitance Ctotal and a total equivalent series resistance ESRtotal can be expressed in equation forms as:Ctotal=C1+C2+ . . . +Cn  (1)and1/ESRtotal=1/ESR1+1/ESR2+. . . +1/ESRn  (2)where Ci is a capacitance of the i-th (i=1 to n) capacitor and ESRi is an equivalent series resistance.
Therefore, if a plurality of elements can be connected in parallel within a required cubical configuration as mentioned above, it is possible to increase the capacity and to reduce the ESR. It is the same as in forming a solid electrolytic capacitor as a transmission-line noise filter.
There has been disclosed a conventional technology for reducing an ESR by connecting a plurality of capacitor elements in parallel, for example, in Japanese Unexamined Patent Publication (JP-A) No. 2002-75807. The first conventional technology has a structure shown in FIG. 1. Referring to FIG. 1, there are shown a capacitor element 201, an anode lead-out wire 202, an anode comb terminal 204, and a hoop material 208.
Furthermore, there has been disclosed a solid electrolytic capacitor having anode leads penetrating through the inside thereof and available as a transmission-line noise filter having a low impedance, for example, in Japanese Patent (JP-B) No. 2921242. The solid electrolytic capacitor as the second conventional technology is shown in FIG. 2. Referring to FIG. 2, there are shown an anode lead 281, an anode lead terminal 283, an anode body 284, and a cathode lead terminal 285.
When a plurality of capacitor elements are connected in parallel to achieve a low ESR, the ESRs of the individual capacitor elements are preferably as low as possible. In this case, a capacitor element having a larger external surface area achieves a lower ESR due to a skin effect in a high frequency domain such as, for example, exceeding 100 kHz on condition that the capacitor elements have the same volume.
Therefore, a thin-type element is needed as a requirement for designing the capacitor element (Width W>Thickness T). If elements each having the configuration are put in a horizontal direction on the anode terminal as in the first conventional technology, a resultant element has a large dimension in the height direction, thereby not satisfying the demand for the thin-type element.
Furthermore, it becomes hard to achieve a mold package size such as 7.3 mm×4.3 mm×2.8 mm or 7.3 mm×4.3 mm×1.9 mm, which are generally used.
Still further, it is hard to achieve both of a low ESR and dimensions of a thin type also when the capacitor element is used as a transmission-line noise filter.